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Help configuring an IL9325 panel

Started by lampii, December 04, 2016, 09:44:47 am

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lampii

Hello,

I am trying to run the Waveshare 3.2" LCD (IL9325) panel using an stm32F429. I've managed to drive the 16bit bus along with the control lines correctly since I can read out the panels ID from the first register. I have been having a very hard time trying to get the panels drawing pictures, but I am not sure what I am doing wrong. I can go from a white screen, to a bit of a darker background after running my initialization procedure but any attempts to draw have no effect. I was hoping if someone here had any insight on what to look at for my symptoms or if they could take a look at my register settings to see if I am doing anything blatantly wrong.

Any help would be greatly appreciated. And Andy, thank you so much for your site. It has proved to be a very useful tool for learning.

void IL9325Init()
{
   WriteData(0x00e7,0x0010);

    WriteData(0x0000, 0x0001); /* Start internal OSC. */
    WriteData(0x0001, (0<<10)|(1<<8)); /* Set SS and SM bit */
    WriteData(0x0002, 0x0700); /* Set 1 line inversion */
    WriteData(0x0003, (1<<12)|(1<<5)|(1<<4)|(0<<3)); /* Set GRAM write direction and BGR=1. */
    WriteData(0x0004, 0x0000); /* Resize register */
    WriteData(0x0008, 0x0207); /* Set the back porch and front porch */
    WriteData(0x0009, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */
    WriteData(0x000A, 0x0000); /* FMARK function */
    WriteData(0x000C, 0x0001); /* RGB interface setting */
    WriteData(0x000D, 0x0000); /* Frame marker Position */
    WriteData(0x000F, 0x0000); /* RGB interface polarity */

    /* Power On sequence -----------------------------------------------------*/
    WriteData(0x0010, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
    WriteData(0x0011, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */
    WriteData(0x0012, 0x0000); /* VREG1OUT voltage */
    WriteData(0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
    delay_ms(2000);                      /* Dis-charge capacitor power voltage (200ms) */

WriteData(0x0010,0x0AC8); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
WriteData(0x0011,0x223);//0x0227);/* DC1[2:0], DC0[2:0], VC[2:0] */
    delay_ms(500);                       /* Delay 50 ms */
WriteData(0x0012,  0x001F);

    delay_ms(500);

    /* Delay 50 ms */
    WriteData(0x0013, 0x1900);/* VDV[4:0] for VCOM amplitude */
    WriteData(0x0029,0x003E);/* VCM[4:0] for VCOMH */
    WriteData(0x002B,0x000E);/* Set Frame Rate */

    delay_ms(500);                       /* Delay 50 ms */
    WriteData(0x0020, 0x0000); /* GRAM horizontal Address */
    WriteData(0x0021, 0x0000); /* GRAM Vertical Address */
    delay_ms(500);                       /* Delay 50 ms */

    /* Adjust the Gamma Curve (ILI9325)---------------------------------------*/

    WriteData(0x0030,0x0007);
    WriteData(0x0031,0x0707);
    WriteData(0x0032,0x0006);
    WriteData(0x0035,0x0704);
    WriteData(0x0036,0x1f04);
    WriteData(0x0037,0x0004);
    WriteData(0x0038,0x0000);
    WriteData(0x0039,0x0706);
    WriteData(0x003c,0x0701);
    WriteData(0x003d,0x000f);
    delay_ms(500);                       /* Delay 50 ms */

    /* Set GRAM area ---------------------------------------------------------*/
    WriteData(0x0050, 0x0000); /* Horizontal GRAM Start Address */
    WriteData(0x0051, 0x00EF); /* Horizontal GRAM End Address */
    WriteData(0x0052, 0x0000); /* Vertical GRAM Start Address */
    WriteData(0x0053, 0x013F); /* Vertical GRAM End Address */

    WriteData(0x0060,  0xA700); /* Gate Scan Line(GS=1, scan direction is G320~G1) */
    WriteData(0x0061,  0x0001); /* NDL,VLE, REV */
    WriteData(0x006A, 0x0000); /* set scrolling line */

    /* Partial Display Control -----------------------------------------------*/
    WriteData(0x0080, 0x0000);
    WriteData(0x0081, 0x0000);
    WriteData(0x0082, 0x0000);
    WriteData(0x0083, 0x0000);
    WriteData(0x0084, 0x0000);
    WriteData(0x0085, 0x0000);

    /* Panel Control ---------------------------------------------------------*/
    WriteData(0x0090, 0x0010);
    WriteData(0x0092, 0x0600);
    WriteData(0x0093, 0x0003);
    WriteData(0x0095, 0x0110);
    WriteData(0x0097, 0x0000);
    WriteData(0x0098, 0x0000);

    /* Set GRAM write direction and BGR = 1 */
    /* I/D=00 (Horizontal : increment, Vertical : decrement) */
    /* AM=1 (address is updated in vertical writing direction) */
    //WriteData(0x0003, 0x1018);
    WriteData(0x0007, 0x0133); /* 262K color and display ON */
}

lampii

So after trying to write my config by hand for hours, and yielding no results, i scoured the web again for iL9325 configs. I came across this repo, https://github.com/adafruit/adafruit-rpi-fbtft, which contained 3-4 different startup configurations for this specific controller. Fortunately enough, their 9325c config worked wonderfully. It's weird that if i set the Frame Rate to the maximum value, the LCD wont work properly either. Now, I am controlling this LCD via a hybrid FMC approach where I toggle the ctrl lines manually but FMC handles the data exchange. When ever I set my RD, CS, WR, RS pins to their alternate function, my FMC stops streaming. Time to dig deeper  ;D.




Andy Brown

Quote from: lampii on December 06, 2016, 09:41:03 pm
When ever I set my RD, CS, WR, RS pins to their alternate function, my FMC stops streaming. Time to dig deeper  ;D.

It might be timing. If you have a logic analyser then probe WR and some data lines to see how long your write transaction is versus the limits in the datasheet. The F429 is a very fast device and you could be exceeding the LCD timing limits when using the FMC. Setting the lines manually with GPIO will be much, much slower and could be bringing you back into spec.

Also, CS is usually not required and can be tied low (active).
It's worse than that, it's physics Jim!

lampii

Hi Andy!

Thanks for your response and also for your very excellent write ups.

I managed to track my issue down to the RS line not being toggled. This was due to the use of FMC_A17 as an address bit and failing to set the bit by using the proper memory location within the code. It seems to be working well configured as FMC.